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SoC Logic Design Engineer at Altera Corporation: H-1B salaries
6 labor condition applications for the job title SoC Logic Design Engineer at Altera Corporation. Median offered base salary $151,132; middle half $143,434–$166,234.
Kaayyoo (LCAs)6
Gatii tajaajilaa giddu-galeessa$151,132
Harka gidduu gatiiwwan$143,434–$166,234
Sadarkaa 10ffaa–90ffaa$125,889–$193,552
Akka waggaa maallaqaaatti
| Bara maallaqaa | LCAs | Baasii giddu-galeessaa |
|---|---|---|
| FY2025 | 4 | $161,454 |
| FY2026 | 2 | $130,512 |
Applications
| Baasii bu'uuraa | Bakka | Dhiyaate | Guyyaa jalqabaa | Haala |
|---|---|---|---|---|
| $150,369–$177,290 | San Jose, CA | 23-Cam-2026 | 01-Onk-2026 | Mirkaneffame |
| $110,656–$130,100 Sadarkaa II | Austin, TX | 17-Sad-2025 | 17-Sad-2025 | Mirkaneffame |
| $171,014–$203,400 | San Jose, CA | 28-Hag-2025 | 25-Gur-2026 | Mirkaneffame |
| $216,091–$285,700 Sadarkaa IV | San Jose, CA | 29-Ado-2025 | 23-Sad-2025 | Mirkaneffame |
| $151,895–$181,700 | San Jose, CA | 17-Wax-2025 | 29-Ful-2025 | Mirkaneffame |
| $141,122–$181,700 | San Jose, CA | 26-Elb-2025 | 22-Hag-2025 | Mirkaneffame |
Other jobs at Altera Corporation
- Product Development Engineer$129,012
- FPGA Silicon Design Verification Engineer$151,895
- SoC Design Verification Engineer$109,080
- FPGA Silicon Design Engineer$177,254
- Software Enabling and Optimization Engineer$155,727
Baajanni gatii gadii gatii hojii iyyannoo tokkoo tokkoon irratti dhiyaate yoo ta'u, gara baajannaa waggaatti jijjiirame; lakkoofsa hojii guutuu hamma guyyaa guutuu qofa fayyadama. LCA mirkaneessa viizaa miti; LCA tokko hojii hedduu haguuchuuf ni danda'a. Madda: Dhaabbata Hojii Ameerikaa, OFLC LCA Disclosure Data, bara maallaqaa 2023–2026 (murtii haaraa 30-Wax-2026).