Dachaigh › Luchd-obrach › Altera Corporation › FPGA Silicon Design Engineer
FPGA Silicon Design Engineer aig Altera Corporation: Tuarastalan H-1B
5 iarrtasan cumhaichean-obrach airson an dreuchd FPGA Silicon Design Engineer aig Altera Corporation. Tuarastal bunasach meadhanach $177,254; leth meadhanach $170,504–$178,006.
Iarrtasan (LCAs)5
Tuarastal meadhanach a chaidh a thabhann$177,254
Leath mheadhanach nan tuarastalan$170,504–$178,006
Ceudail 10mh–90mh$132,132–$178,023
A rèir bliadhna ionmhais
| Bliadhna mhaoine | LCAs | Tuarastal meadhanach |
|---|---|---|
| FY2025 | 4 | $173,879 |
| FY2026 | 1 | $178,035 |
Iarrtasan
| Tuarastal bunasach | Àite | Air a chur a-steach | Ceann-latha tòiseachaidh | Inbhe |
|---|---|---|---|---|
| $178,035–$203,400 | San Jose, CA | 18 Màrt 2026 | 23 Cèit 2026 | Dearbhaichte |
| $106,550–$146,600 | San Jose, CA | 5 Lùna 2025 | 11 Lùna 2025 | Dearbhaichte |
| $177,254–$258,300 | Milpitas, CA | 1 Lùna 2025 | 4 Lùna 2025 | Dearbhaichte |
| $170,504–$190,770 | San Jose, CA | 9 Cèit 2025 | 12 Cèit 2025 | Dearbhaichte |
| $178,006–$203,400 Ìre III | San Jose, CA | 28 Gibl 2025 | 1 Dàmh 2025 | Dearbhaichte |
Obraichean eile aig Altera Corporation
- Product Development Engineer$129,012
- FPGA Silicon Design Verification Engineer$151,895
- SoC Design Verification Engineer$109,080
- SoC Logic Design Engineer$151,132
- Software Enabling and Optimization Engineer$155,727
Is e na tuarastalan an ìre as ìsle den tuarastal a chaidh a thabhann air gach iarrtas, air an tionndadh gu suim bhliadhnail; cleachdaidh na staitistigean iarrtasan làn-aimsire le teisteanas a-mhàin. Chan eil LCA na aontachadh bhìosa agus faodaidh aon LCA còmhdach a dhèanamh air iomadh dreuchd. Stòr: Roinn an Obrach na SA, Dàta Foillseachaidh OFLC LCA, bliadhnaichean ionmhais 2023–2026 (co-dhùnadh as ùire 30 Ògmh 2026).